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CS 598 JTE - Special Topics - Energy-Efficient Comp Architec

Campus: Urbana-Champaign

Description:

Subject offerings of new and developing areas of knowledge in computer science intended to augment the existing curriculum. See Class Schedule or departmental course information for topics and prerequisites. Course Information: May be repeated in the same or separate terms if topics vary.

Special Instructions:

All class meetings will be online and synchronous Topic: Energy-Efficient Computer Architecture This course will discuss recent issues and research trends in designing computer architectures for energy efficiency. The course will start with an analysis of process variation and wear-out, which constrains and affects energy efficiency. We will examine models and techniques for variation tolerance at different levels. They include body biasing, processors with timing speculation, and variation-aware application scheduling. We will then focus on low-voltage computer architecture, which is our best hope for energy efficiency. We will examine how to reduce voltage guard-bands and manage voltage droops. Higher-level techniques include pipeline design for low voltage, efficient eDRAM refresh, extensive power gating, and effective on-chip controllers. Next, we will consider 3D architectures and how they can improve energy efficiency. Finally, we will focus on extreme-scale computer architectur

Option 1

Number of Required Visit(s): 0

Course Level: Graduate

Credit: 4

Term(s): Fall


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